SpacemiT and XiangShan unveil V100 RISC-V server CPU with three servers
Overview
SpacemiT and the XiangShan team introduced the V100 RISC-V server CPU and three complete servers at the RISC-V China Summit in Shenzhen on October 19.
The V100 is a 46-core hybrid chip with six XiangShan Kunminghu V2R2 cores and 40 SpacemiT X100 cores, running at up to 2.4GHz. The companies say the chip passed all BRS tests and runs openEuler, Ubuntu, Debian and Red Hat directly. These specifications and compliance claims come from SpacemiT.
SpacemiT says the chip has been validated with domestic accelerators, including Kunlunxin's M100. The company also offers server motherboards, firmware, BMC management and hardware reference designs so partners can build their own branded machines.
Written by AI from the articles below · updated Oct 20, 3:30 AM ET
Check the sources:
Article timeline
The articles in this story. Times are ET.
- PandailyNewsSpacemiT pairs its V100 RISC-V server CPU with three servers and Linux support
AISpacemiT and the XiangShan team introduced the V100 RISC-V server CPU alongside three complete servers at the RISC-V China Summit on October 19. The V100 is a 46-core hybrid chip with six XiangShan Kunminghu V2R2 cores and 40 SpacemiT X100 cores, running at up to 2.4GHz. The company says it passed all BRS tests and that openEuler, Ubuntu, Debian, Red Hat and other distributions run on it directly. The specifications and compliance claims come from SpacemiT.
Heat Trend
Not enough continuous observations to show a trend yet.