SpacemiT pairs its V100 RISC-V server CPU with three servers and Linux support

SpacemiT and the XiangShan team introduced the V100 RISC-V server CPU alongside three complete servers at the RISC-V China Summit on October 19.

The V100 is a 46-core hybrid chip with six XiangShan Kunminghu V2R2 cores and 40 SpacemiT X100 cores, running at up to 2.4GHz. The company says it passed all BRS tests and that openEuler, Ubuntu, Debian, Red Hat and other distributions run on it directly.

The specifications and compliance claims come from SpacemiT.