PyTorch adds compile-time heuristics that pick Helion kernel configs without autotuning
Overview
PyTorch says Helion now picks kernel configurations such as block sizes, warps and stages at compile time, without autotuning.
The heuristics analyze a kernel's IR and dataflow and classify it as matmul, reduction or pointwise, and a family-specific heuristic emits the config. On H100, PyTorch reports the heuristic reaches 1.18x the speed of hand-written Triton in Flash Linear Attention and 1.27x that of vLLM's CUDA reduction kernels.
The heuristics are enabled by default on H100 and B200 when using the Triton backend. If a kernel's extents are not all known at compile time, no heuristic fires and Helion falls back to its original default.
Written by AI from the articles below · updated Nov 12, 11:47 AM ET
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- PyTorch BlogOfficialPyTorch explains compile-time heuristics that pick Helion kernel configs without autotuning
AIPyTorch says Helion now uses compile-time heuristics that analyze a kernel's IR and dataflow to choose block sizes, warps, and stages without autotuning. Kernels are classified as matmul, reduction, or pointwise, and a family-specific heuristic emits the config. On H100, the authors report the heuristic reaches 1.18x of hand-written Triton in Flash Linear Attention and 1.27x of vLLM's CUDA reduction kernels. The heuristics are enabled by default on H100 and B200 with the Triton backend.
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