UltraRISC shows UR-CP400 RISC-V core IP with RVA23 and 8-wide out-of-order design
AIUltraRISC showed its UR-CP400 RISC-V processor core IP at the sixth RISC-V Summit China in Shenzhen, and plans to deliver it to customers in Q1 2027. The core supports the RVA23 profile and RISC-V vector extension 1.0, with an 8-wide out-of-order design and a 14-stage pipeline.
AIWhy it matters.
The article separates the core's stated specs from unverified FPGA-based performance claims, which helps readers judge what UR-CP400 has actually shown so far.
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Pandaily · contact@pandaily.com (Pandaily) · pandaily.comPublished · added here
Original title: UltraRISC Shows UR-CP400 RISC-V Core IP: RVA23, 8-Wide Out-of-Order, Delivery in Q1 2027